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1/13 l6920 february 2005 1 features 0.6 to 5.5v operating input voltage 1v start up input voltage internal synchronous rectifier zero shut down current 3.3v and 5v fixed or adjustable output voltage (2v up to 5.2v) 120m ? internal active switch low battery voltage detection reverse battery protection 1.1 applications one to three cell battery devices pda and hand held instruments cellular phones - digital cordless phone pagers gps digital cameras 2 description the l6920 is a high efficiency step-up controller re- quiring only three external components to realize the conversion from the battery voltage to the selected output voltage. the start up is guaranteed at 1v and the device is op- erating down to 0.6v. internal synchronous rectifier is implemented with a 120m ? p-channel mosfet and, in order to improve the efficiency, a variable frequency control is imple- mented. 1v high efficiency syn cronous step up converter figure 1. application circuit l1 lx 8 out 1 fb 3 6 lbo gnd shdn 7 5 lbi 2 ref 4 v cc v out 2.5v 3.3v 500ma l6920d c2 c3 c1 fi gure 1. p ac k age table 1. order codes part number package l6920d tssop8 tube L6920DTR tape & reel tssop8 rev. 2
l6920 2/13 table 1. pin description figure 2. pin connection (top view) table 2. absolute maximum ratings table 3. thermal data pin name function 1fb output voltage selector. connect fb to gnd for vout=5v or to out for vout=3.3v. connect fb to an external resistor divider for adjustable output voltage (from 2v to 5.2v) [see r4 and r5, fig. 7]. 2 lbi battery low voltage detector input. the internal threshold is set to 1.23v. a resistor divider is needed to adjust the desired low battery threshold: [see r1 and r2, fig. 7] 3 lbo battery low voltage detector output. if the voltage at the lbi pin drops below the internal threshold typ. 1.23v, lbo goes low. the lbo is an open drain output and so a pull-up resistor (about 200k ? ) has to be added for correct output setting [see r3, fig. 7]. 4 ref 1.23v reference voltage. bypass this output to gnd with a 100nf capacitor for filtering high frequency noise. no capacitor is required for stability 5 shdn shutdown pin. when pin 5 is below 0.2v the device is in shutdown, when pin 5 is above 0.6v the device is operating. 6 gnd ground pin 7 lx step-up inductor connection 8 out power output pin symbol parameter value unit v ccmax v cc to gnd 6 v lbi, shdn, fb to gnd 6 v v out max vout to gnd 6 v symbol parameter value unit r th j-amb thermal resistance junction to ambient 250 c/w t j maximum junction temperature 150 c v lbi 1.23v = 1 r1 r2 ------- - + ?? ?? ? fb lbi ref gnd lx out 1 3 2 4 6 5 7 8 tssop 8 lbo shdn
3/13 l6920 table 4. electrical characteristcs (v in = 2v, fb = gnd, t amb = -40c to 85c and t j < 125c unless otherwise specified) symbol parameter test condition min. typ. max. unit v cc section v in minimum operating input voltage 0.6 v v in minimum start up input voltage 1 v i q quiescent current i l =0 ma, fb = 1.4v, v out = 3.3v lbi = shdn = 2v, t j = t amb 915 a i l =0 ma, fb = 1.4v, v out = 5v lbi = shdn = 2v, t j = t amb 11 18 a i sd shut down current v in = 5v, i l =0 ma 0.1 1 a irev reverse battery current v in = -4v, t j = t amb 0.1 2 a power section r on-n active switch on resistance 120 250 m ? r on-p synchronous switch on resistance 120 250 m ? control section v ou t output voltage fb = out, i l =0 ma 3.2 3.3 3.4 v fb = gnd, i l =0 ma 4.955.1v output voltage range external divider 2 5.2 v v lbi lbi threshold 1.18 1.23 1.27 v 0c < t j < 70c 1.205 1.23 1.255 v v lbo lbo logic low i sink < 250 a 0.20.4v i lim lx switch current limit 0.8 1 1.2 a t onmax maximum on time v out = 2v to 5.3v 3.75 5 6.25 s t offmin minimum off time v out = 2v to 5.3v 0.75 1 1.25 s shdn shdn logic low 0.2 v shdn logic high 0.6 v v ref reference voltage 1.18 1.23 1.27 v
l6920 4/13 figure 3. efficiency vs. output current figure 4. efficiency vs. output current figure 5. startup voltage vs output current 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 100 1000 load current [ma] efficiency [%] vin = 2.4v vin = 1.2v vout = 3.3v l = 47 h c = 100 f 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 100 1000 load current [ma] efficiency [%] f vout = 5v l = 47 h c = 100 f vin = 1.2v vin = 2.4v vin = 3.6v 0 0.2 0.4 0.6 0.8 1 1.2 1.4 30 60 90 120 150 180 output current (ma) startup voltage (v) l = 47 h c = 22 f
5/13 l6920 3 detailed description the l6920 is a high efficiency, low voltage step-up dc/dc converter particularly suitable for 1 to 3 cells (li-ion/ polymer, nimh respectively) battery up conversion. these performances are achieved via a strong reduction of quiescent current (10 a only) and adopting a syn- chronous rectification, that implies also a reduced cost in the application (no external diode required). operation is based on maximum on time - minimum off time control, tailored by a current limit set to 1a. a simplified block diagram is shown here below. figure 6. simplified block diagram 4 principle of operation in l6920 the control is based on a comparator that cont inuously checks the status of output voltage. if the output voltage is lower than the expected value, t he control function of the l6920 directs the energy stored in the inductor to be transferred to the load. this is accomplished by alternating between two basic steps: - ton phase: the energy is transferred from the battery to the inductor by shorting lx node to ground via the n- channel power switch. the switch is turned off if the current flowing in the inductor reaches 1a or after a max- imum on time set to 5 s. - toff phase: the energy stored in the inductor is transfe rred to the load through the synchronous switch for at least a minimum off time equal to 1 s. after this, the synchronous switch is turned off as soon as the output voltage goes lower than the regulated voltage or the current flowing in the inductor goes down to zero. so, in case of light load, the device works in pfm mode, as shown in figures 7 to 10. r q s ton max 5 sec toff min 1 sec vbg vbg vbg a b c - + - + - + - + - + vout zero crossing opamp (cr) current limit out fb gnd v ref lbi lbo d99in1041 shdn lx v in v out v out gnd r 1 ,r 2 fb y y a b c - +
l6920 6/13 figure 7. pfm mode condition: v out = 5v; v in =1.5v. trace1: vout (50mv~/div) trace 4: il (100ma/div) time div.: 5 s/div figure 8. heavier load - train pulses overlapping. trace1: v out (100mv~/div) trace 4: i l (200ma/div) time div.: 10 s/div figure 9. heavy load - inductor current ripples below i lim trace1: v out (100mv~/div) trace 4: i l (200ma/div) time div.: 20 s/div figure 10. heavy load and high esr. regulation falls in continuous mode of operation. trace1: v out (100mv~/div) trace 4: i l (200ma/div). time div.: 5 s/div when iload is heavier, the pulse trains are overlapped. figures 7 - 8 show some possible behaviors. considering that current in the inductor is limited to 1a, the maximum load current is defined by the following relationship: eq. (1) where is the efficiency and i lim =1a. of course, if iload is greater than iload_lim the regulation is lost (figure 11). i load_lim v in v out ----------- i lim t off min ? v out v in ? 2l ? ------------------------- - ? ?? ?? ?? =
7/13 l6920 figure 11. no regulation. i load > i load_lim trace1: v out (100mv~/div) trace 4: i l (200ma/div). time div.: 5 s/div 4.1 start-up one of the key features of l6920 is the startup at sup- ply voltage down to 1v (please see the diagram in figure 5. in case of heavy load). the device leaves the startup mode of operation as soon as vout goes over 1.4v. during startup, the synchronous switch is off and the energy is trans- ferred to the load through its intrinsic body diode. the n-channel switches with a very low rdson thanks to an internal charge pump used to bias the power mos gate. because of this modified behavior, ton/toff times are lengthened. current limit and zero crossing detection are still available. 4.2 shutdown in shutdown mode ( shdn pulled low) all internal cir- cuitries are turned off, minimizing the current provid- ed by the battery (i shdn < 100 na, in typical case). both switches are turned off, and the low battery comparator output is forced in high impedance state. the synchronous switch body diode causes a para- sitic path between power supply and output that can't be avoided also in shutdown. 4.3 low battery detection the l6920 includes a low battery detector compara- tor. threshold is vref voltage and a 1.3% hystere- sis is added to avoid oscillations when input crosses the threshold slowly. the lbo is an open drain out- put so a pull up resistor is required for a proper use. 4.4 reverse polarity a protection circuit has been implemented to avoid that l6920 and the battery are destroyed in case of wrong battery insertion. in addition, this circuit has been designed so that the current required by the battery is zero also in reverse polarity. 5 application information 5.1 output voltage selection output voltage must be selected acting on fb pin. three choices are available: fixed 3.3v, 5v or adjust- able output set via an external resistor divider. table 5. output voltage selection v out = 3.3v fb pin connected to out (see application circuit) v out = 5v fb pin connected to gnd 2v v out 5.2v fb pin connected to a resistive divider v out 1.23v 1 r4 r5 ------- - + ?? ?? =
l6920 8/13 figure 12. demoboard circuit table 6. r4, r5 should be selected in the range of 100k ? - 10m ? to minimize consumption and error due to current sunk by fb pin (few na). 5.2 output capacitor selection the output capacitor affects both effici ency and output ripple so its choice has to be considered with particular care. the capacitance value should be in the range of about 10 f-100 f. an additional, smaller, low esr capacitor can be in parallel for high frequency filtering. a typical value can be around 1 f. if very high performances, in terms of efficiency and output voltage ripple, are required, a very low esr capac- itor has to be chosen. ceramic capacitors are the lowest esr but they are very expensive. other possibilities are low-esr tantalum capacitors, available from kemet, avx and other sources. poscap capacitors from sanyo and polymeric capacitors from panasonic are also good. below there is a list of some capacitors suppliers. the cap values and rated voltages are only a suggested pos- sibility jumper position function j1 1-2 device enabled 2-3 device disabled j2 none adjustable using r4 and r5 [not mounted] 1-2 3.3v output voltage 2-3 5v output voltage l1 10 h +vbatt +vbatt vbatt f.b. vout 7 1 8 gnd panasonic ell6rh100m panasonic eefcdj470r panasonic eefcdj470r c2 47 f c3 n.c. c1 47 f c4 100nf r1 n.c. r3 n.c. r2 n.c. not mounted components r4 n.c. r5 n.c. vout gnd 1 2 3 3 2 j2 j1 1 lbo 3 shdn 5 vref gnd 4 6 lbi 2 lbo shdn l6920 d01in1310
9/13 l6920 table 7. capacitors distributors main list 5.3 inductor selection usually, inductors ranging between 5 h to 40 h satisfy most of the applications. small value inductors have smaller physical size and guarantee a faster response to load transient but in steady state condition a bigger ripple on output voltage is generated. in fact the output ripple voltage is given by ipeak multiplied by esr. furthermore, as shown in equation (1), inductor size affects also the maximum current de- liverable to the load. lastly, a low series resistance is suggested if very high efficiency values are needed. any- way, the saturation current of the choke should be highe r than the peak current limit of the device (1a). good surface mounting inductors are available from coilcrafts, coiltronics, murata and other souc- es. in the following table are listed some suggested components. table 8. inductors distributors main list 5.4 layout guidelines the board layout is very important in order to minimi ze noise, high frequency resonance problems and electro- magnetic interference. it is essential to keep as small as possible the high sw itching current circulating paths to reduce radiation and resonance problems. so, the output and input cap should be very close to the device. the external resistor dividers, if used, should be as clos e as possible to the pins of the device (fb and lbi) and as far as possible from the high current circulating paths, to avoid pick up noise. large traces for high current paths and an extended groundplane, help to reduce the noise and increase the efficiency. for an example of recommended layout see the following evaluation board. manufacturer series cap value ( f) rated voltage (v) esr (m ? ) avx tps 15 to 470 6.3 50 to 1500 kemet t510/t494/ t495 10 to 470 6 30 to 1000 panasonic eefcd 22 to 47 6.3 50 to 700 sanyo poscap tpa/b/c 22 to 230 6.3 40 to 80 sprague 595d 100 to 390 6.3 160 to 700 manufacturer series inductor value (uh) saturation current (a) coilcraft do1813hc 22 to 33 1 to 1.2 do1608 4.7 to 15 0.9 to 1.5 coiltronics up1b 22 to 33 1 to 1.2 tp3 4.7 to 15 0.97 to 1.6 bi hm76-2 22 to 33 1 to 1.2 hm76-1 4.7 to 10 1 to 1.5 murata lqn6c 10 to 22 1.2 to 1.7 panasonic ell6sh 10 to 22 0.9 to 1.5 ell6rh 5.1 to10 11 to 1.55 sumida cr43 4.7 to 10 0.84 to 1.15
l6920 10/13 figure 13. demoboard components (top side). figure 14. demoboard layout (top side). figure 15. demoboard layout (bottom side). 4cm 4.5cm 4cm 4.5cm 4cm 4.5cm
11/13 l6920 6 package information figure 16. tssop8 mechanical data & package dimensions outline and mechanical data dim. mm inch min. typ. max. min. typ. max. a 1.20 0.047 a1 0.050 0.150 0.002 0.006 a2 0.800 1.000 1.050 0.031 0.039 0.041 b 0.190 0.300 0.007 0.012 c 0.090 0.200 0.003 0.008 d (1) 2.900 3.000 3.100 0.114 0.118 0.122 e 6.200 6.400 6.650 0.244 0.252 0.260 e1 (1) 4.300 4.400 4.500 0.169 0.173 0.177 e 0.650 0.026 l 0.450 0.600 0.750 0.018 0.024 0.027 l1 1.000 0.039 k 0? (min.) 8? (max.) aaa 0.100 0.004 note: 1. d and f does not include mold flash or protrusions. mold flash or potrusions shall not exceed 0.15mm (.006inch) per side. tssop8 0079397 (jedec mo-153-aa) (body 4.4mm)
l6920 12/13 7 revision history table 9. revision history date revision description of changes may 2003 1 first issue. february 2005 2 modified the max. value of the i sd parameter in the table 4 pag. 3.
information furnished is believed to be accurate and reliable. however, stmicroelectronics assu mes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replac es all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com 13/13 l6920

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